This invention relates to communication systems including selectively addressable battery-powered devices, such as personal pager receivers, and more particularly to an arrangement for minimizing power usage in such devices.
Various battery saving arrangements have been proposed for portable, selectively addressable battery-powered devices, such as personal pager receivers. In most communication systems employing such devices, battery drain is minimized by operating the pager receiver in a plurality of modes, typically including a signal seeking mode in which minimum power is applied to the receiver detecting circuits for the minimum amount of time necessary to detect the start of a transmission; a signal verification mode in which power is applied only to those portions of the receiver circuits that operate to verify that the detected transmission is a valid transmission and to determine if the transmission includes the address code that is assigned to the receiver; and an active mode in which full power is applied to the receiver circuits to operate devices that produce an audible alarm, a visual display, and the like, for indicating that a valid paging signal has been received. The ability of the pager receiver to function in the proper mode is enhanced by the nature of the transmission.
One transmission code format which has been adopted as the international standard for use in radio paging systems was developed by the British Post Office Code Standardization Advisory Group. The code format is commonly referred to as the POCSAG code. The POCSAG code comprises a preamble followed by a plurality of batches of complete codewords. The preamble is a pattern of bit reversals 101010 . . . repeated for a period of at least 576 bits. Each batch comprises a thirty-two bit sync codeword which is followed by eight frames of address and/or message, each frame containing two thirty-two bit codewords.
In the battery saving mode, power is applied to the signal detecting and decoding circuits of the pager receiver circuits for a predetermined amount of time and a predetermined number of bits are sampled. The amount of on time with this method is inversely related to the probability of false preamble signal detection. The fixed on time mode is easy to implement. However, the minimum number of bits that must be sampled in order to insure (with a probability exceeding 0.9998) against false preamble detection when N=2 is twenty-one. N is the number of bits that have been received in error due to noise. This requires at least 41 ms of on time. This provides an off:on ratio of 24.4:1.
Therefore, it would be desirable to have an arrangement which provides a battery saving mode which is characterized by a substantially higher off:on ratio than that previously provided by conventional POCSAG battery saving modes, and which arrangement is readily implemented and is compatible with existing POCSAG systems.